[1] Moore G E. Cramming more components onto integrated circuits[J]. Electronics, 1965, 38(8): 114.
[2] Moore G E. Progress in digital integrated electronics[C]//Proceedings of the Internaional Electron Devices Meeting.Piscataway NJ: IEEE, 1975.
[3] Lee M, Pak J S, Kim J. Electrical design of through silicon via[M]. London: Springer Dordrecht, 2014: 3-4.
[4] 魏红军, 段晋胜. TSV制程关键工艺设备技术及发展[J].电子工业专用设备, 2014, 43(5): 7-10.
[5] Lau J H. Semiconductor advanced packagin[M]. Singapore: Springer Singapore, 2021: 313-314.
[6] Kim H C, Kim J J. Through-silicon-via filling process using Cu electrodeposition[J]. Korean Chemical Engineering Research, 2016, 54(6): 723-733.
[7] Kim S H, Braun T M, Lee H J, et al. Microstructure and texture in copper filled millimeter scale through silicon vias[J]. Journal of The Electrochemical Society, 2022, 169(3): 032508.
[8] Roh M H, Sharma A, Lee J H, et al. Extrusion Suppression of TSV filling metal by Cu-W electroplating for three-dimensional microelectronic packaging[J]. Metallurgical and Materials Transactions A, 2015, 46(5): 2051-2062.
[9] Josell D, Moffat T P. Superconformal bottom-up nickel deposition in high aspect ratio through silicon vias[J].ECS Transactions, 2016, 163(7): 322.
[10] Braun T M, Kim S H, Lee H J, et al. Superconformal nickel deposition in through silicon vias: Experiment and prediction[J]. Journal of The Electrochemical Society, 2018, 165(7): 291-300.
[11] Josell D, Silva M, Moffat T P. Superconformal bottomup cobalt deposition in high aspect ratio through silicon vias[J]. ECS Transactions, 2016, 163(14): D809.
[12] Josell D, Moffat T P. Superconformal bottom-up gold deposition in high aspect ratio through silicon vias[J]. Journal of the Electrochemical Society, 2017, 164(6): D327.
[13] Wang X, Xiong M, Chen Z, et al. Wideband capacitance evaluation of silicon-insulator-silicon through-silicon-vias for 3D integration applications[J]. Proceedings of the IEEE Electron Device Letters, 2016, doi: 10.1109/LED.2015.2506551.
[14] Ogutu P, Fey E, Dimitrov N. Superconformal filling of high aspect ratio through glass vias (TGV) for interposer applications using TNBT and NTBC additives[J]. Journal of the Electrochemical Society, 2015, 162(9): D457.
[15] Ogutu P, Fey E, Dimitrov N. Superconformal filling of through vias in glass interposers[J]. ECS Electrochemistry Letters, 2014, 3(8): D30.
[16] Kim S H, Lee H J, Braun T M, et al. Effect of chloride on microstructure in Cu filled microscale through silicon vias[J]. Journal of the Electrochemical Society, 2021, 168(11): 112501.
[17] Moffat T P, Josell D. Extreme bottom-up superfilling of through-silicon-vias by damascene processing: Suppressor disruption, positive feedback and turing patterns[J].Journal of the Electrochemical Society, 2012, 159(4):D208.
[18] Moffat T P, Wheeler D, Huber W H, et al. Superconformal electrodeposition of copper[J]. Electrochemical and Solid-State Letters, 2001, 4(4): C26.
[19] Wang F L, Le Y P. Experiment and simulation of single inhibitor SH110 for void-free TSV copper filling[J]. Scientific Reports, 2021, 11(1): 12108.
[20] 冀林仙 . 基于多物理场耦合的印制电路电镀铜互连研究[D]. 成都: 电子科技大学, 2016.
[21] Feng Z V, Li X, Gewirth A A. Inhibition due to the interaction of polyethylene glycol, chloride, and copper in plating baths: A surface-enhanced raman study[J]. The Journal of Physical Chemistry B, 2003, 107(35): 9415-9423.
[22] Josell D, Moffat T P. Superconformal copper deposition in through silicon vias by suppression-breakdown[J].Journal of the Electrochemical Society, 2018, 165(2):23-30.
[23] Josell D, Moffat T P. Extreme bottom-up filling of through silicon vias and damascene trenches with gold in a sulfite electrolyte[J]. Journal of the Electrochemical Society, 2013, 160(12): D3035.
[24] Josell D, Wheeler D, Moffat T P. Modeling extreme bottom-up filling of through silicon vias[J]. Journal of the Electrochemical Society, 2012, 159(10): D570.
[25] Wang F, Wang F L, Liu X M. The key role of suppressor diffusion in defect-free filling of the through-silicon-via with high depth[J]. Journal of Micromechanics and Microengineering, 2019, 29(5): 055005.
[26] Xu J Y, Wang S X, Su Y Z, et al. Investigation of through-hole copper electroplating with methyl orange as a special leveler[J]. Journal of Electrochemistry,2022, 28(7): 2213003.
[27] Tang J, Zhu Q S, Zhang Y, et al. Copper bottom-up filling for through silicon via (TSV) using single JGB additive[J]. ECS Electrochemistry Letters, 2015, 4(9): 28-30.
[28] Wang F L, Zeng P, Wang Y, et al. High-speed and high-quality TSV filling with the direct ultrasonic agitation for copper electrodeposition[J]. Microelectronic Engineering, 2017, 180(5): 30-34.
[29] 郑莉 . 调控铜沉积的有机添加剂体系及其电化学性能研究[D]. 成都: 电子科技大学, 2020.
[30] Sung M, Kim S H, Lee H J, et al. Working mechanism of iodide ions and its application to Cu microstructure control in through silicon via filling[J]. Electrochimica Acta, 2019, 295(1): 224-229.
[31] Sung M, Yoon Y, Hong J, et al. Bromide ion as a leveler for high-speed TSV filling[J]. Journal of the Electrochemical Society, 2019, 166(13): D546.
[32] Wang S, Lee S W R. Fast copper plating process for Through Silicon Via (TSV) filling[C]//Proceedings of the ASME 2011 International Mechanical Engineering Congress and Exposition. New York: American Society of Mechanical Engineers, 2011: 855-863.
[33] Tsai T H, Huang J H. Electrochemical investigations for copper electrodeposition of through-silicon via[J]. Microelectronic Engineering, 2011, 88(2): 195-199.
[34] Yoshimi S, Fujimoto K, Akazawa M, et al. Development of 300 mm TSV interposer with redistribution layers on both sides using MEMS processes[C]// Proceedings of 2013 IEEE 63rd Electronic Components and Technology Conference. Piscataway NJ: IEEE, 2013: 2168-2172.
[35] Li H Y, Liao E, Pang X F, et al. Fast electroplating TSV process development for the via-last approach[C]//Proceedings of the 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC). Piscataway NJ: IEEE, 2010: 777-780.
[36] Wang L, Cai J, Wang Q, et al. Electroplating Cu on ALD TiN for high aspect ratio TSV[C]//Proceedings of the 2015 16th International Conference on Electronic Packaging Technology (ICEPT). Piscataway NJ: IEEE,2015: 676-680.
[37] Xiao H B, Wang F L, Wang Y, et al. Effect of ultrasound on copper filling of high aspect ratio through-silicon via (TSV)[J]. Journal of the Electrochemical Society,2017, 164(4): D126.
[38] 纪执敬, 凌惠琴, 吴培林, 等 . 玻璃通孔三维互连镀铜填充技术发展现状[J]. 电化学, 2022, 28(6): 2104461.
[39] Wang Z Y, Wang H, Cheng P, et al. Simultaneous filling of through silicon vias (TSVs) with different aspect ratios using multi-step direct current density[J]. Journal of Micromechanics and Microengineering, 2014, 24(8):085013.
[40] Hong S C, Lee W G, Kim W J, et al. Reduction of defects in TSV filled with Cu by high-speed 3-step PPR for 3D Si chip stacking[J]. Microelectronics Reliability,2011, 51(12): 2228-2235.
[41] Wang F L, Zhao Z P, Nie N T, et al. Dynamic through-silicon-via filling process using copper electrochemical deposition at different current densities[J]. Scientific Reports, 2017, 7(1): 46639.
[42] Wang F, Wang F L, Liu X M, et al. Experimental study of current density in copper filling process within deep through-silicon vias with high aspect ratio[J]. Journal of Micromechanics and Microengineering, 2019, 29(12):125013.
[43] Delbos E, Omnès L, Etcheberry A. Bottom-up filling optimization for efficient TSV metallization[J]. Microelectronic Engineering, 2010, 87: 514-516.
[44] Jin S, Seo S, Wang G, et al. Electrodeposition of nanotwin Cu by pulse current for Through-Si-Via (TSV) Process[J]. Journal of Nanoscience and Nanotechnology,2016, 16(5): 5410-5414.
[45] Shi S, Wang X F, Xu C L. Simulation and fabrication of two Cu TSV electroplating methods for wafer-level 3D integrated circuits packaging[J]. Sensors and Actuators A: Physical, 2013, 203: 52-61.
[46] Kim J, Cui J, Fichthorn K A. Solution-phase growth of Cu nanowires with aspect ratios greater than 1000: Multiscale theory[J]. ACS Nano, 2021, 15(11): 18279-18288.
[47] Kobayashi K, Sano A, Akahoshi H, et al. Trench and via filling profile simulations for copper electroplating process[C]//Proceedings of the IEEE 2000 International Interconnect Technology Conference. Piscataway NJ:IEEE, 2000: 34-36.
[48] Tenno R, Pohjoranta A. An ALE model for prediction and control of the microvia fill process with two additives[J]. Journal of the Electrochemical Society, 2008, 155(5): D383
[49] Chen Z H, Liu S. Simulation of copper electroplating fill process of through silicon via[C]//Proceedings of the 2010 11th International Conference on Electronic Packaging Technology & High Density Packaging. Piscataway NJ: IEEE, 2010: 433-437.
[50] Zhu Y H, Ma S L, Sun X, et al. Numerical modelling and experimental verification of through silicon via (TSV) filling in presence of additives[J]. Microelectronic Engineering, 2014, 117: 8-12.
[51] Zhang Y Z, Sun Y N, Ding G F, et al. Numerical simulation and mechanism analysis of through-silicon via (TSV) filling using an Arbitrary Lagrange-Eulerian (ALE) method[J]. Journal of the Electrochemical Society,2015,162(10): D540.
[52] Wang F L, Zhao Z P, Wang F, et al. A novel model for through-silicon via (TSV) filling process simulation considering three additives and current density effect[J].Journal of Micromechanics and Microengineering, 2017,27(12): 125017.
[53] Wang F, Zhao Z P, Nie N T, et al. Effect of via depth on the TSV filling process for different current densities[J]. Journal of Micromechanics and Microengineering,2018, 28(4): 045004.
[54] 孙云娜, 吴永进, 谢东东, 等 . 硅通孔内铜电沉积填充机理研究进展[J]. 电化学, 2022, 28(7): 2213001.
[55] Song C S, Wu H, Jing X M, et al. Numerical simulation and experimental verification of copper plating with different additives for through silicon vias[C]//Proceedings of the 2012 4th Electronic System-Integration Technology Conference. Piscataway NJ: IEEE, 2012: 1-6.
[56] Wu H Y, Wang Y, Li Z Y, et al. Investigations of the electrochemical performance and filling effects of additives on electroplating process of TSV[J]. Scientific Reports, 2020, 10(1): 9204.
[57] 卢跃 . 铜互连镀铜添加剂的电化学机理研究[D]. 上海:上海交通大学材料学, 2013.
[58] 张媛, 鲁冠斌, 王旭东, 等 . 胺结构调控硅通孔电镀铜单组分添加剂的性能[J]. 半导体技术, 2022, 47(10):796-803.
[59] Tomie M, Akita T, Irita M, et al. Transitional additive adsorption with co-addition of suppressor and leveler for copper TSV filling[J]. Journal of the Electrochemical Society, 2020, 167(8): 082513.
[60] Akita T, Tomie M, Ikuta R, et al. Observation of the behavior of additives in copper electroplating using a microfluidic device[J]. Journal of the Electrochemical Society, 2018, 166(1): D3058.
[61] Kondo K, Akolkar R N, Barke D P, et al. Copper electrodeposition for nanofabrication of electronics devices[M].New York: Springer Dordrecht Heidelberg, 2014: 38-39.
